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NXP Semiconductors /LPC15xx /SYSCON /SCTPLLCLKSEL

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Interpret as SCTPLLCLKSEL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (IRC)SEL0RESERVED

SEL=IRC

Description

SCT PLL clock source select

Fields

SEL

SCT PLL clock source

0 (IRC): IRC

1 (SYSTEM_OSCILLATOR): System oscillator

2 (RESERVED): Reserved

3 (RESERVED): Reserved
RESERVED

Reserved

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data